The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
A power supply receives input power and generates output power that may be used to power one or more components. For example, the output power may be used to power one or more components of an integrated circuit (IC). The output power may be generated by manipulating the input power. Linear power supplies (or linear regulators) may generate the output power by dissipating a portion of the input power. Switched-mode power supplies, on the other hand, may control switching of transistors to charge/discharge an inductor which provides the output power. Switched-mode power supplies, therefore, may be more efficient than linear power supplies. The switching of switched-mode power supplies, however, may cause output voltage ripple.
Notch filters (also known as band-reject filters) may be used in pulse-width modulated (PWM) controlled systems to attenuate unwanted frequency components from a control signal in a given frequency range. For example, notch filters may be used in switched-mode power supplies to remove output voltage ripple. Referring now to FIG. 1, a notch filter 10 is shown that receives an input signal x(n) and generates an output signal y(n) having attenuated frequency components in a given frequency range. A first adder 12 generates a sum of the input signal x(n) and outputs of first and second amplifiers 14 and 16 having gains −a1 and −a2, respectively. A third amplifier 18 applies a gain b0 to the output of the first adder 12.
A first delay 20 applies a one unit delay (z′) to the output of the first adder 12. The first amplifier 14, a fourth amplifier 22, and a second delay 24 each receive the output of the first delay 20. The first amplifier 14 applies the gain −a1 to the output of the first delay 20. The fourth amplifier 22 applies a gain b1 to the output of the first delay 20. The second delay 24 applies a one unit delay (z−1) to the output of the first delay 20. The second amplifier 16 and a fifth amplifier 26 each receive the output of the second delay 24. The second amplifier 16 applies the gain −a2 to the output of the second delay 24. The fifth amplifier 26 applies a gain b2 to the output of the second delay 24. A second adder 28 generates the output signal y(n) by summing the outputs of the third, fourth, and fifth amplifiers 18, 22, and 26, respectively.
The transfer function H(z) performed by the notch filter 10 may be expressed as follows:
      H    ⁡          (      z      )        =                              b          0                +                              b            1                    ⁢                      z                          -              1                                      +                  b          2                      z            -            2                                      1        +                              a            1                    ⁢                      z                          -              1                                      +                  a          2                      z            -            2                                .  